In recent years, semiconductor devices, which include a memory cell having a selecting transistor and a memory cell transistor, have been proposed.
In such semiconductor devices, a bit line, a word line, a source line and the like are suitably selected by a column decoder or a row decoder, so that a memory cell is selected, and information is read from, written into, or erased from the selected memory cell.
In the proposed semiconductor devices, when information is written into a memory cell, a high voltage is applied to a source line connected to a source of a memory cell transistor and a control gate of the memory cell transistor. As a result, hot electrons are generated and some of them are implanted into a floating gate of the memory cell transistor, so that information is written into the memory cell transistor.
In the proposed semiconductor devices, however, the source line is connected commonly to sources of a plurality of memory cell transistors. For this reason, when information is written, a high voltage is applied also to the sources of the memory cell transistors other than the memory cell transistor selected as an object into which the information is written. For this reason, erroneous writing such as writing into the non-selected memory cell transistors, which are not selected as objects into which information is not written, cannot be sufficiently prevented.